1. Field of the Invention
The present invention relates to electronic components and more specifically to electronic components including a built-in directional coupler.
2. Description of the Related Art
A chip-type directional coupler (hereafter, simply referred to as directional coupler) described in Japanese Unexamined Patent Application Publication No. 5-152814 is an example of a known electronic component of the related art. In this directional coupler, a multilayer structure is formed by stacking a plurality of rectangular electrode substrates on top of one another. In addition, a U-shaped stripline electrode which defines a main line (hereafter, simply referred to as a main line) and a U-shaped stripline electrode which defines a sub line (hereafter, simply referred to as a sub line) are provided on the electrode substrates. The main line is provided on a different electrode substrate than the sub line. That is, the main line and the sub line are arranged in the stacking direction. In addition, outer electrodes, to which the main line and sub line are connected, are provided on side surfaces of the multilayer structure.
There is a problem with the directional coupler described in Japanese Unexamined Patent Application Publication No. 5-152814 in that if an attempt is made to reduce the size of the directional coupler, manufacturing of the directional coupler becomes more difficult. In more detail, in the directional coupler, the outer electrodes are formed on the side surfaces of the multilayer structure. Accordingly, once a multilayer structure has been obtained by cutting a mother multilayer structure into pieces, the outer electrodes are formed on the multilayer structure by applying a conductive paste. Therefore, if the directional coupler is to be reduced in size, it is necessary to apply a conductive paste to a small multilayer structure and, therefore, it is difficult to form the outer electrodes.
In addition, there is a problem with the directional coupler described in Japanese Unexamined Patent Application Publication No. 5-152814 in that the degree of coupling between the main line and the sub line is relatively low. In more detail, the main line and the sub line are each provided on a single electrode substrate and coupled to each other in the stacking direction. Consequently, in order to increase the degree of coupling between the main line and the sub line, the layer between the main line and the sub line may be formed so as to be relatively thin so that the main line and sub line are as close to each other as possible. However, since there is a limit to how thin a dielectric layer can be made due to processing limitations, the degree of coupling between the main line and the sub line cannot be made sufficiently high.